| dc.contributor.author | Rogers, Paul Leeds, III | |
| dc.description.abstract | Recent work in motor controls has been utilizing the Field Programmable Gate Array (FPGA) instead of using the more standard microprocessors or digital signal processors. FPGAs have the advantage of flexibility and parallelization, allowing the platform to be used for multiple things. One aspect of the FPGA that has not been utilized in motor controls is Dynamic Partial Reconfiguration (DPR), which allows part of the FPGA to be reconfigured without disabling it. In this thesis, two controllers, field-oriented control and voltage-by-frequency control, are implemented on an FPGA using DPR. Only one of the controllers is actually implemented on the FPGA at a time. This system trades FPGA area for memory requirements. This configuration was simulated and implemented in a physical test bench, showing that the transition between controllers at three different speeds is stable, indicating this is a potential direction for motor controls. | en_US |
| dc.publisher | North Dakota State University | en_US |
| dc.rights | NDSU Policy 190.6.2 | |
| dc.title | Dynamic Partial Reconfiguration as an Approach to Motor Control Design | en_US |
| dc.type | Thesis | en_US |
| dc.date.accessioned | 2018-07-30T17:46:23Z | |
| dc.date.available | 2018-07-30T17:46:23Z | |
| dc.date.issued | 2018 | en_US |
| dc.identifier.uri | https://hdl.handle.net/10365/28731 | |
| dc.identifier.orcid | 0000-0002-6808-3653 | |
| dc.description.sponsorship | John Deere, Inc. | en_US |
| dc.rights.uri | https://www.ndsu.edu/fileadmin/policy/190.pdf | |
| ndsu.degree | Master of Science (MS) | en_US |
| ndsu.college | Engineering | en_US |
| ndsu.department | Electrical and Computer Engineering | en_US |
| ndsu.program | Electrical and Computer Engineering | en_US |
| ndsu.advisor | Smith, Scott C. | |
